One of the essential requirement for verification closure is to close functional coverage , coverage measured should accurately measure if the event has occurred in the DUT and the DUT has responded as expected for the event , this requirement can typically be covered using white box assertion and having cover property on the assertion. Using assertion coverage instead of functional coverage is a tradeoff that has to be taken , assertion coverage removes the need for coding coverage monitor but the assertion coverage constructs are not as powerful as the the functional coverage construct in terms of covering cross coverage , having excludes in cross coverage. Most of the cross in assertion coverage need to be done manually. Best strategy one can use is to partition the coverage model between white box coverage assertion and functional coverage on the IO bus to get the best out of both the coverage approach.
Showing posts with label assertion coverage. Show all posts
Showing posts with label assertion coverage. Show all posts
Sunday, December 22, 2013
Saturday, July 13, 2013
System verilog assertion coverage !!!
Functional coverage collection with passive monitor is the method recommended by methodology to collect coverage. There is alternative ways to collect coverage in system verilog using assertion coverage. This feature is very useful if you want to collect coverage on some important DUT events , using assertion coverage has its own advantages and disadvantages.
Advantages of assertion coverage
- Coverage monitors are not required to collect required coverage event and then trigger a cover group.
- Coverage is collected using assertions and using cover property , binding the assertion to the module or instance is required to collect coverage from the DUT.
- Implementing and collecting assertion coverage is faster compared to writing functional coverage for DUT events.
- Assertion coverage is perfect fit for collecting coverage on important DUT events.
Disadvantages of assertion coverage
- Assertions coverage if not coded appropriately takes considerable amount of simulation time.
- Debugging assertion failures is slightly complex than debugging coverage events in a passive monitor.
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